Flash memories typically require a high voltage for modifying data. For example, a multiplexer circuit used for selecting a memory cell to be connected to a sense amplifier or to a write buffer circuit requires high voltage devices. If a sense amplifier is designed for lower voltages, it may need a protection device. The high voltage may be generated by a charge pump and leakage current of the multiplexer circuit may be reduced, in particular minimized.
High voltage devices have thicker gate oxides and larger channel widths and channel lengths than low-voltage devices, so that they can bear higher electric fields caused by the high voltages. As a result, high voltage devices have high threshold voltages and large device areas. The layout and the circuit architecture are therefore optimized to minimize the required area. On the other hand, low voltage devices show improved analog characteristics, and, due to thinner gate oxide, have better matching characteristics, which is important for building analog circuits, such as the sense amplifier. Therefore, the combination of high voltage and low voltage devices is beneficial for the combination of protection and accurate read operation. Because of rather poor characteristics of p-channel devices, n-channel devices may be used predominantly.
During a read operation, a memory cell is selected by means of a first access line, for example a bit-line, and a second access line, for example a word-line. First access lines of memory cells that are not used for selecting and accessing the memory cell may be kept at a defined bias, for example, by being connected to a defined potential, such as the ground potential. As a result, the read operation of the selected memory cell will not be disturbed by capacitive coupling with adjacent first access lines. Usually, n-channel devices are used for biasing the adjacent first access lines. The phrase “adjacent” is used in the specification to mean, e.g., “next to in location” or “neighboring”.
Because the devices in the multiplexer circuit and the discharge devices have the same polarity, an additional bus with an inverted signal has to be routed. The bus is preferably designed for high voltages because the bit-line is biased to voltages larger than the break down voltage of the low voltage devices during write or erase operations. However, a high voltage design requires a high voltage level shifter for the control of the gates which requires area and consumes dynamic power during operation provided by the charge pumps. Typically, charge pumps draw a large current on a supply line conveying a supply voltage VDD. The use of p-channel devices for biasing is possible, however, a negative overdrive is required or the first access lines that are not used for selecting the memory cell are only weakly biased. This situation arises especially in scaled technology nodes where the supply voltage VDD is in the range of the threshold voltage of the high voltage devices.